With the increasing down-scaling of integrated circuits and increasingly demanding requirements to the speed of integrated circuits, transistors need to have higher drive currents with smaller dimensions. Fin Field-Effect Transistors (FinFETs) were thus developed. FinFETs have increased channel widths. The increase in the channel widths is achieved by forming channels that include portions on the sidewalls of semiconductor fins and portions on the top surfaces of the semiconductor fins. Since the drive currents of transistors are proportional to the channel widths, the drive currents of the FinFETs are increased.
In an existing FinFET formation process, Shallow Trench Isolation (STI) regions are first formed in a silicon substrate. The STI regions are then recessed to form silicon fins, which comprise portions of the silicon substrate that are over the recessed STI regions. Next, a gate dielectric, a gate electrode, and source and drain regions are formed to finish the formation of the FinFET. In the case there are electrical fuses to be formed on the same silicon substrate as the FinFET, the electrical fuses may also be formed simultaneously with the formation of the gate dielectric and the gate electrode.